- Posted by doEEEt Media Group
- On June 22, 2020
Power supply switching ripple and control loop phase margin are dominated by the output inductor and the bulk capacitors.
Simple RLC capacitor and inductor models can result in a design with more capacitors than necessary adding to the design cost, consuming valuable circuit board real estate and degrading the control loop performance.
Most capacitor datasheets provide very limited information, such as maximum ESR at 100kHz and not the desired information regarding typical values and frequency dependancies of the C, ESR, and ESL.
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