- Posted by doEEEt Media Group
- On February 19, 2021
Radiation test using SiC power devices
New failure modes not observed in Silicon appear while testing SiC MOSFET and Schottky diodes and under heavy ions radiation. Gate damage in transistors remains undetected even monitoring drain current and gate leakage of the transistor under high voltage biasing conditions.
Only a PIGS (Post Irradiation Gate Stress) test reveals the cumulative damage caused by the ions reducing the voltage withstanding capability of the gate oxide. A different problem appears while testing SiC Schottky diodes where combination of high voltage and heavy ions leads to cumulative irreversible degradation.
New sic testing strategies need to be applied in order to detect and try to understand these new failure modes.
This better understanding starts from detecting the critical parameters involved and try to define safe operating conditions that would allow the space usage of SiC power devices.
Phase 2: Degradation characterization
Bias levels adjusted using info collected during phase 1
- Progressive degradation of the device is observed
- This allows evaluation of the Irev increase ratio Vs:
• Bias Voltage
• Flux of the beam
Phase 3: Safe Operation Range definition
Bias levels adjusted using info collected during phases 1 & 2
- Allocate maximum voltage with no degradation for a certain LET level of interest. Lower LETs than that will imply higher secure maximum voltages.
- Maximum rated voltage for this device is 1200V but under heavy ions radiation… only 250V or less is safe.
Download or read the full report here and check all the executions for the different phases
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